74LVT574
FEATURES
- Inputs and outputs on opposite side of package allow easy
- 3-State outputs for bus interfacing
- mon output enable
- TTL input and output switching levels
- Input and output interface capability to systems at 5V supply
- Bus-hold data inputs eliminate the need for external pull-up
- Live insertion/extraction permitted
- No bus current loading when output is tied to 5V bus
- Power-up 3-State
- Power-up reset
- Latch-up protection exceeds 500m A per JEDEC Std 17
- ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model resistors to hold unused inputs interface to microprocessors
DESCRIPTION
The LVT574 is a high-performance Bi CMOS product designed for VCC operation at 3.3V. This device is an 8-bit, edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates. The state of each D input (one set-up time before the Low-to-High clock...
