Datasheet Summary
74VHC08; 74VHCT08
Quad 2-input AND gate
Rev. 01
- 30 June 2009
Product data sheet
1. General description
The 74VHC08; 74VHCT08 are high-speed Si-gate CMOS devices and are pin patible with Low-power Schottky TTL (LSTTL). They are specified in pliance with JEDEC standard JESD7-A.
The 74VHC08; 74VHCT08 provide the quad 2-input AND function.
2. Features
I Balanced propagation delays I All inputs have a Schmitt-trigger action I Inputs accepts voltages higher than VCC I Input levels:
N The 74VHC08 operates with CMOS logic levels N The 74VHCT08 operates with TTL logic levels I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds...