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80C51 Datasheet PDF

NXP Semiconductors 80C51

80C51/87C51/80C52/87C52 is a high-performance static 80C51 design fabricated with Philips high-density CMOS technology with operation from 2.7 V to 5.5 V. The 8xC51 and 8xC52 contain a 128 × 8 RAM and 256 × 8 RAM respectively, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning.
Part No. 80C51
Datasheet 80C51 Download
Manufacturer
NXP Semiconductors
Description 8-bit microcontrolle
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80C51 datasheet page 1 preview

DESCRIPTION

The Philips In addition, the device is a low power static design which offers a wide range of operating frequencies down to zero. Two software selectable modes of power reduction—idle mode and power-down mode are available. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. Since the design is static, the clock can be stopped without loss of user data and then the execution resumed from the point the clock was stopped. SELECTION TABLE For applications requiring more ROM and RAM, see the 8XC54/58 and 8XC51RA+/RB+/RC+/80C51RA+ data sheet. Note: 80C31/80C32 is specified in separate data sheet. ROM/EPROM Memory Size (X by 8) RAM Size (X by 8) Programmable Timer Counter (PCA) 80C31*/80C51/87C51 0K/4K 128 No 80C32*/80C52/87C52 0K/8K/16K/32K 256 No 80C51RA+/8XC51RA+/RB+/RC+ 0K/8K/16K/32K 512 Yes 8XC51RD+ 64K 1024 Yes Hardware Watch Dog Timer No No Yes Yes

FEATURES

● 8051 Central Processing Unit – 4k × 8 ROM (8...
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