FEATURES
I I I I I I I I I I I I I I 10-bit resolution Sampling rate up to 50 MHz DC sampling allowed One clock cycle conversion only High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz) No missing codes guaranteed In-Range (IR) CMOS output Levels TTL and CMOS compatible digital inputs 3 V to 5 V CMOS digital outputs Low-level AC clock input signal allowed Internal reference voltage regulator Power dissipation only 235 mW (typical) Low analog input capacitance, no buffer amplifier required No sample-and-hold circuit required 3. APPLICATIONS
High-speed analog-to-digital conversion for: I Video data digitizing I Radar I Transient signal analysis I Global Positioning System (GPS) receiver I Σ∆ modulators NXP Semiconductors ADC1003S030/040/050 Single 10 bits ADC, up to 30 MHz, 40 Mhz or 50 MHz, with voltage regulator I Cellular based stations I Barcode scanner I Medical imaging 4. Quick reference data Table 1.