FEATURES AND BENEFITS
SNR, 62 dBFS; SFDR, 86 dBc Sample rate up to 125 Msps 10-bit pipelined ADC core Clock input divider by 2 for less jitter contribution Single 3 V supply Flexible input voltage range: 1 V p-p to 2 V p-p CMOS or LVDS DDR digital outputs Pin compatible with the ADC1410S series and the ADC1210S series HVQFN40 package Input bandwidth, 600 MHz Power dissipation, 430 mW at 80 Msps Serial Peripheral Interface (SPI) Duty cycle stabilizer Fast OuT of Range (OTR) detection INL ±0.07 LSB, DNL ±0.04 LSB Offset binary, two’s complement, gray code Power-down and Sleep modes 3. APPLICATIONS
Wireless and wired broadband communications Spectral analysis Ultrasound equipment Portable instrumentation Imaging systems Software define radio NXP Semiconductors ADC1010S series ADC1010S series; CMOS or LVDS DDR digital outputs 4. Ordering information Table 1. Ordering information fs (Msps) Package Name ADC1010S125HN/C1 125 ADC1010S105HN/C1 105 A...