BUK9880-55 Datasheet | NXP Semiconductors

DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mounting. The device features very low on-state resistance and has integral zener diodes giving ESD protection. It is intended for use in automotive and general purpose switching applications. QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current Total power dissipation Junction temperature Drain-source on-state resistance VGS = 5 V MAX. 55 7.5 1.8 150 80 UNIT V A W ˚C mΩ PINNING - SOT223 PIN 1 2 3 4 gate drain source drain (tab) DESCRIPTION PIN CONFIGURATION SYMBOL d g s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ID ID ID IDM Ptot Ptot Tstg, Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Total power dissipation Storage & operating temperature CONDITIONS RGS = 20 kΩ Tsp = 25 ˚C On PCB in Fig.2 Tamb = 25 ˚C On PCB in Fig.2 Tamb = 100 ˚C Tsp = 25 ˚C Tsp = 25 ˚C On PCB in Fig.2 Tamb = 25 ˚C MIN. - 55 MAX. 55 55 10 7.5 3.5 2.2 40 8.3 1.8 150 UNIT V V V A A A A W W ˚C ESD LIMITING VALUE SYMBOL VC PARAMETER Electrostatic discharge capacitor voltage CONDITIONS Human body model (100 p F, 1.5 kΩ) MIN. MAX. 2 UNIT k V April 1998 Rev 1.100 Philips Semiconductors Product specification Trench MOS™ transistor Logic level FET THERMAL RESISTANCES SYMBOL Rth j-sp Rth j-amb PARAMETER From junction to solder point From junction to ambient CONDITIONS Mounted on any PCB Mounted on PCB of Fig.18 TYP. 12 - BUK9880-55 MAX. 15 70 UNIT K/W K/W STATIC CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS ±V(BR)GSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Gate source leakage current CONDITIONS...