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GTL2010 Datasheet PDF

NXP Semiconductors GTL2010

The GTL2010 is a high speed 10-bit voltage clamp. The low ON-state resistance of the clamp allows connections to be made with minimal propagation delay. The device is organized as one 10-bit voltage clamp.
Part No. GTL2010
Datasheet GTL2010 Download
Manufacturer
NXP Semiconductors
Description 10-bit GTL Processor Voltage Clamp
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GTL2010 datasheet page 1 preview

FEATURES

● Direct interface with TTL level
● 6.5Ω ON-state connection between port Sn and Dn

DESCRIPTION

The GTL2010 is a high speed 10-bit voltage clamp. When S or D is low, the clamp is in the ON–state and a low resistance connection exists between the S and D ports. When S port and D port are high, the clamp is in the OFF-state and a very high impedance exists between the S and D ports. When port D is high, the voltage on the S port is clamped to the applied reference voltage on the GREF port. PIN CONFIGURATION GND 1 SREF 2 S1 3 S2 4 S3 5 S4 6 S5 7 S6 8 S7 9 S8 10 S9 11 S10 12 24 23 22 21 20 19 18 17 16 15 14 13 GREF DREF D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 SA00527 QUICK REFERENCE DATA SYMBOL tPLH COFF PARAMETER Propagation delay Sn to Dn Channel capacitance (OFF-state) CONDITIONS Tamb = 25°C; GND = 0V VDD1 = 3.3V; VDD2 = 2.5V; VREF = 1.5V; unloaded VS = 1.5V TYPICAL 1.5 7.5 UNIT ns pF ORDERING INFORMATION PACKAGES 24-Pin Plastic TSSOP Type II TEMPERATURE RANGE 0°C to +85°C OUTSIDE NORTH...
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