NXP Semiconductors HEF4006B
The HEF4006B is an 18-stage shift register arranged as two 4-stage and two 5-stage shift registers with a common clock input (CP). The two 4-stage shift registers each have a data input (DA, DB) and a data output (O3A, O3B); the two HEF4006B MSI 5-stage shift registers each have a data input (DC, DD) and data outputs from the fourth and fifth stages (O3C, O4C, O3D, O4D). The registers can be operated in parallel or interconnected to form a single shift register of up to 18 bits.| Part No. | HEF4006B |
|---|---|
| Datasheet | HEF4006B Download |
| Manufacturer |  NXP Semiconductors |
| Description | 18-stage static shift register |
| Buy | Stock & Price |
DESCRIPTION
Data are shifted into the first register position of each register from the data inputs (DA to DD) and all the data in each register are shifted one position to the right on the HIGH to LOW transition of CP. Fig.2 Pinning diagram. HEF4006BP(N): HEF4006BD(F): HEF4006BT(D): Fig.1 Functional diagram. 14-lead DIL; plastic (SOT27-1) 14-lead DIL; ceramic (cerdip) (SOT73) 14-lead SO; plastic (SOT108-1) ( ): Package Designator North America FUNCTION TABLE Dn D1 X Notes 1. X = state is immaterial 2. 3. = positive-going transition = negative-going transition CP On(5) D1 no change PINNING DA to DD CP data inputs clock input (HIGH to LOW; edge-triggered) O3A to O3D; O4C; O4D data outputs FAMILY DATA, IDD LIMITS category MSI See Family Specifications 4. D1 = either HIGH or LOW 5. The moment D1 appears at O depends on the register length. January 1995 2 Philips Semiconductors Product specification 18-stage static shift register HEF4006B MSI Fig.3 Logic diagram. January 1995 3 Philips Semic...
