Datasheet4U Logo Datasheet4U.com

HEF40098B - 3-state hex inverting buffer

General Description

The HEF40098B is a hex inverting buffer with 3-state outputs.

The 3-state outputs are controlled by two active LOW enable inputs (1OE and 2OE).

Key Features

  • Fully static operation.
  • 5 V, 10 V, and 15 V parametric ratings.
  • Standardized symmetrical output characteristics.
  • Specified from 40 C to +85 C.
  • Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +85 C Type number Package Name.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
HEF40098B 3-state hex inverting buffer Philips
HEF40098B Hex inverting buffer nexperia
HEF4001B Quadruple 2-input NOR gate Philips
HEF4001B Quad 2-input NOR gate nexperia
HEF4001B-Q100 Quad 2-input NOR gate nexperia

Other Datasheets by NXP Semiconductors

Part Number Description
HEF40097B 3-state hex non-inverting buffer
HEF4000B Dual 3-input NOR gate and inverter
HEF4001B Quadruple 2-input NOR gate
HEF4001UB Quadruple 2-input NOR gate
HEF4002B Dual 4-input NOR gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
HEF40098B Hex inverting buffer; 3-state Rev. 8 — 21 November 2011 Product data sheet 1. General description The HEF40098B is a hex inverting buffer with 3-state outputs. The 3-state outputs are controlled by two active LOW enable inputs (1OE and 2OE). A HIGH on 1OE causes four of the six active LOW buffer elements (1Y0 to 1Y3) to assume a high-impedance or OFF-state regardless of the other input conditions and a HIGH on 2OE causes the outputs of the remaining two buffer elements (2Y0 and 2Y1) to assume a high-impedance or OFF-state regardless of the other input conditions. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2.