NXP Semiconductors HEF4015B
The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input (MR). The clock input’s Schmitt trigger action makes the input highly tolerant of slower clock rise and fall times.FEATURES AND BENEFITS
● Tolerant of slow clock rise and fall times●