Datasheet Details
| Part number | HEF40160B |
|---|---|
| Manufacturer | NXP Semiconductors |
| File Size | 155.58 KB |
| Description | 4-bit synchronous decade counter with asynchronous reset |
| Datasheet | HEF40160B_PhilipsSemiconductors.pdf |
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Overview: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC.
| Part number | HEF40160B |
|---|---|
| Manufacturer | NXP Semiconductors |
| File Size | 155.58 KB |
| Description | 4-bit synchronous decade counter with asynchronous reset |
| Datasheet | HEF40160B_PhilipsSemiconductors.pdf |
|
|
|
The HEF40160B is a fully synchronous edge-triggered 4-bit decade counter with a clock input (CP), an overriding asynchronous master reset (MR), four parallel data inputs (P0 to P3), three synchronous mode control inputs (parallel enable (PE), count enable parallel (CEP) and count enable trickle (CET)), buffered outputs from all four bit positions (O0 to O3) and a terminal count output (TC).
Operation is fully synchronous (except for the MR input) and occurs on the LOW to HIGH transition of CP.
When PE is LOW, the next LOW to HIGH transition of CP loads data into the counter from P0 to P3 regardless of the levels of CEP and CET inputs.
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