HEF4044B
feature allows mon busing of the outputs.
HEF4044BP(N): 16-lead DIL; plastic (SOT38-1) HEF4044BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4044BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING EO S0 to S3 R0 to R3 O0 to O3 mon output enable input set inputs (active LOW) reset inputs (active LOW) 3-state buffered latch outputs
FUNCTION TABLE INPUTS EO L H H H Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state immaterial Z = high impedance OFF-state Fig.1 Functional diagram. FAMILY DATA, IDD LIMITS category MSI See Family Specifications Sn X L X H Rn X H L H
OUTPUT On Z H L latched
January 1995
Philips Semiconductors
Product specification
Quadruple R/S latch with 3-state outputs
HEF4044B MSI
Fig.4 Logic diagram (one latch).
Fig.3 Logic diagram.
January 1995
Philips Semiconductors
Product specification
Quadruple R/S latch with 3-state outputs
AC CHARACTERISTICS VSS = 0 V; Tamb = 25...
