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HEF4066B - Quad single-pole single-throw analog switch

Download the HEF4066B datasheet PDF. This datasheet also covers the HEF-4066 variant, as both devices belong to the same quad single-pole single-throw analog switch family and are provided as variant models within a single manufacturer datasheet.

General Description

The HEF4066B has four independent bilateral analogue switches (transmission gates).

Each switch has two input/output terminals (Y/Z) and an active HIGH enable input (E).

When E is connected to VDD a low impedance bidirectional path between Y and Z is established (ON condition).

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (HEF-4066-B.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
HEF4066B Quad single-pole single-throw analog switch nexperia
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HEF4060B 14-stage ripple-carry binary counter/divider and oscillator Philips
HEF4060B-Q100 14-stage ripple-carry binary counter/divider and oscillator nexperia

Other Datasheets by NXP Semiconductors

Part Number Description
HEF4060B 14-stage ripple-carry binary counter/divider and oscillator
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4066B gates Quadruple bilateral switches Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification Quadruple bilateral switches DESCRIPTION The HEF4066B has four independent bilateral analogue switches (transmission gates). Each switch has two input/output terminals (Y/Z) and an active HIGH enable input (E). When E is connected to VDD a low impedance bidirectional path between Y and Z is established (ON condition).