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HEF4527B - BCD rate multiplier

General Description

The HEF4527B is a BCD rate multiplier with two buffered rate outputs (O1 and O1), two buffered terminal count outputs (TC and TC), four BCD rate select inputs (SA, SB, SC, SD), a common clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input (STR), a cascad

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4527B MSI BCD rate multiplier Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification BCD rate multiplier DESCRIPTION The HEF4527B is a BCD rate multiplier with two buffered rate outputs (O1 and O1), two buffered terminal count outputs (TC and TC), four BCD rate select inputs (SA, SB, SC, SD), a common clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input (STR), a cascade input (CAS) and an active LOW count enable input (CE).