HEF4527B
DESCRIPTION
The HEF4527B is a BCD rate multiplier with two buffered rate outputs (O1 and O1), two buffered terminal count outputs (TC and TC), four BCD rate select inputs (SA, SB, SC, SD), a mon clock input (CP), a preset input (PL), an overriding asynchronous clear input (CL), a strobe input (STR), a cascade input (CAS) and an active LOW count enable input (CE). The BCD rate multiplier provides an output pulse rate based upon the BCD input number. For example, if 6 is the BCD number, there will be six output pulses for every ten clock input pulses. The output is clocked on the negative-going transition of the clock. When CE, STR, CAS, CL and PL are LOW, the rate pulses are available at the outputs O1 and O1, the terminal count pulses at TC and TC.
HEF4527B MSI
A HIGH on CL resets the counter, independent of all other input conditions and a rate of 10 pulses is available at O1 and O1 when SD is HIGH. When CE is HIGH, the counter is disabled, the state of the outputs (O1, O1) depend...
