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HSTL16919 - HSTL-to-LVTTL memory address latch

Description

The HSTL16919 is a 9-bit to 18-bit D-type latch designed for 3.15 to 3.45 V VCC operation.

The D inputs accept HSTL levels and the Q outputs provide LVTTL levels.

The HSTL16919 is particularly suitable for driving an address bus to two banks of memory.

Features

  • Inputs meet JEDEC HSTL Std. JESD 8.
  • 6, and outputs meet Level III specifications PIN.

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Datasheet Details

Part number HSTL16919
Manufacturer NXP
File Size 89.24 KB
Description HSTL-to-LVTTL memory address latch
Datasheet download datasheet HSTL16919 Datasheet
Additional preview pages of the HSTL16919 datasheet.

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www.DataSheet4U.com INTEGRATED CIRCUITS HSTL16919 9-bit to 18-bit HSTL to LVTTL memory address latch with 12k ohm pull-up resistor Product data File under Integrated Circuits ICL03 2001 Jul 19 Philips Semiconductors Philips Semiconductors Product data 9-bit to 18-bit HSTL to LVTTL memory address latch with 12k ohm pull-up resistor HSTL16919 FEATURES • Inputs meet JEDEC HSTL Std. JESD 8–6, and outputs meet Level III specifications PIN CONFIGURATION 2Q1 1Q1 GND D1 D2 VCC D3 D4 1 2 3 4 5 6 7 8 9 48 VCC 47 VCC 46 1Q2 45 2Q2 44 GND 43 1Q3 42 2Q3 41 VCC 40 1Q4 39 2Q4 38 GND 37 1Q5 36 2Q5 35 GND 34 1Q6 33 2Q6 32 VCC 31 1Q7 30 2Q7 29 GND 28 1Q8 27 2Q8 26 VCC 25 VCC • 12k Ω pull-up on D and LE inputs • ESD classification testing is done to JEDEC Standard JESD22.
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