LPC2101
Overview
The LPC2101/02/03 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 8 kB, 16 kB or 32 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate.
- 1 Enhanced features Enhanced features are available in parts LPC2101/02/03 labelled Revision A and higher: I Deep power-down mode with option to retain SRAM memory and/or RTC. I Three levels of flash Code Read Protection (CRP) implemented.
- 2 Key features I 16-bit/32-bit ARM7TDMI-S microcontroller in tiny LQFP48 and HVQFN48 packages. I 2 kB/4 kB/8 kB of on-chip static RAM and 8 kB/16 kB/32 kB of on-chip flash program memory. 128-bit wide in
