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LS1046A - SoC

Key Features

  • LS1046A has four cores and LS1026A has two cores.
  • Four 32-bit/64-bit Arm® Cortex®-v8 A72 CPUs.
  • Arranged as a single cluster of four cores sharing a single 2 MB L2 cache.
  • Up to 1.8 GHz operation.
  • Single-threaded cores with 32 KB L1 data cache and 48 KB L1 instruction cache.
  • Hierarchical interconnect fabric.
  • Up to 700 MHz operation.
  • One 32-bit/64-bit DDR4 SDRAM memory controller with ECC and interleaving support.
  • Up.

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NXP Semiconductors Data Sheet: Technical Data QorIQ LS1046A, LS1026A Data Sheet Features • LS1046A has four cores and LS1026A has two cores • Four 32-bit/64-bit Arm® Cortex®-v8 A72 CPUs – Arranged as a single cluster of four cores sharing a single 2 MB L2 cache – Up to 1.8 GHz operation – Single-threaded cores with 32 KB L1 data cache and 48 KB L1 instruction cache • Hierarchical interconnect fabric – Up to 700 MHz operation • One 32-bit/64-bit DDR4 SDRAM memory controller with ECC and interleaving support – Up to 2.