Overview: NXP Semiconductors Data Sheet: Technical Data IMX7ULPCEC Rev. 0, 06/2019 i.MX 7ULP Applications Processor—Consumer Products MCIMX7U5DVP07SC MCIMX7U5DVK07SC MCIMX7U3DVK07SC The i.MX 7ULP product family members are optimized for power- sensitive applications benefiting from NXP's Heterogeneous Multicore Processing (HMP) architecture. Achieving an efficient balance between processing power and deterministic processing needs, the i.MX 7ULP is an asymmetric processor consisting of two separate processing domains: an application domain and a real-time domain. The application domain is built around an ARM® Cortex®-A7 processor with an ARM NEON™ SIMD engine and floating point unit (FPU) and is optimized for rich OS based applications. The real-time domain is built around an ARM Cortex-M4 processor (with FPU) optimized for lowest possible leakage. Both domains are completely independent, with Plastic packages: BGA 14x14mm, 0.5mm pitch, and BGA 10 x 10 mm, 0.5 mm pitch separate power, clocking, and peripheral domains, but the bus fabric of each domain is tightly integrated for efficient communication. The part is streamlined to minimize pin count, enabling small packages and simple system integration. Feature type ARM Processor
On-chip memory External memory interfaces Security i.
