MPC5510 Description
NXP Semiconductors Data Sheet: Technical Data Document Number:.
MPC5510 Key Features
- Single issue, 32-bit CPU core plex (e200z1)
- pliant with the Power Architecture™ embedded category
- Includes an instruction set enhancement allowing variable length encoding (VLE) for code size footprint reduction. With
- Up to 1.5-Mbyte on-chip flash with flash control unit (FCU)
- Up to 80 Kbytes on-chip SRAM
- Memory protection unit (MPU) with up to sixteen region
- Interrupt controller (INTC) capable of handling
- Frequency modulated Phase-locked loop (FMPLL)
- 16-channel enhanced direct memory access controller
- Boot assist module (BAM) supports internal flash