MPC5646C Description
NXP Semiconductors Data Sheet: Technical Data Document Number:.
MPC5646C Key Features
- e200z4d dual issue, 32-bit core Power Architecture pliant CPU
- Up to 120 MHz
- 4 KB, 2/4-Way Set Associative Instruction Cache
- Variable length encoding (VLE)
- Embedded floating-point (FPU) unit
- Supports Nexus3+
- e200z0h single issue, 32-bit core Power Architecture pliant CPU
- Up to 80 MHz
- Variable length encoding (VLE)
- Supports Nexus3+