Datasheet Summary
NXP Semiconductors Data Sheet: Technical Data
P2020 QorIQ Integrated Processor Hardware Specifications
Document Number: P2020EC Rev. 3, 03/2016
WB-TePBGA- 689 31 mm × 31 mm
The following list provides an overview of the P2020 feature set:
- Dual high-performance Power Architecture® e500 cores.
- 36-bit physical addressing
- Double-precision floating-point support
- 32-Kbyte L1 instruction cache and 32-Kbyte L1 data cache for each core
- 800-MHz to 1.33-GHz clock frequency
- 512 Kbyte L2 cache with ECC. Also configurable as SRAM and stashing memory.
- Three 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)
- TCP/IP acceleration, quality of service, and...
