NXP Semiconductors P60D145_SDS
The P60D145 dual interface secure microcontroller is part of the most recent P60Step-Up! It delivers unprecedented security, extended memory footprint, and highest performance across all typical up-to-date requested fast transaction cases in Payment and eGov.FEATURES AND BENEFITS
2.1 Key features● User EEPROM: up to 142,5 KB
● User ROM: – 512 KB, y = P or M or D or J – 586 KB, y = X
● User RAM: up to 10176 Bytes
● Dual Interface Type according to ISO/IEC 14443/7816
● Rich option choice of certified convergence implementations: – y = P (Plain, no convergence implementations) – y = X (Plain, no convergence implementations, extended User ROM) – y = M (MIFARE Plus/Classic implementation) – y = D (MIFARE DESFire EV1 implementation) – y = J (Joint, common MIFARE Plus/Classic/DESFire EV1 implementation)
● Contactless VHBR data rate up to 1.7 Mbit/s (card to reader)
● Hardware-based Physically Unclonable Function (PUF) implemented: provides strong protection for secret keys and data
● SmartICE Development tool chain with true bond-out chip and Softmasking Device allows faster time to market 2.2 Hardware features
● Economic and resilient ROM/EEPROM design – data retention time: 25 years minimum – endurance: 500000 cycles – versatile EEPROM program...