P60D145_SDS Description
The P60D145 dual interface secure microcontroller is part of the most recent P60Step-Up! family generation and builds on the IntegralSecurity architecture. It delivers unprecedented security, extended memory footprint, and highest performance across all typical up-to-date requested fast transaction cases in Payment and eGov.
P60D145_SDS Key Features
- User EEPROM: up to 142,5 KB
- User ROM
- 512 KB, y = P or M or D or J
- 586 KB, y = X
- User RAM: up to 10176 Bytes
- Dual Interface Type according to ISO/IEC 14443/7816
- Rich option choice of certified convergence implementations
- y = P (Plain, no convergence implementations)
- y = X (Plain, no convergence implementations, extended User ROM)
- y = M (MIFARE Plus/Classic implementation)
P60D145_SDS Applications
- Dedicated high-performance secure coprocessor FAME2 for Public Key Infrastructure (PKI) cryptography (RSA, ECC)
- High-performance secured hardware support for symmetric block cipher algorithms