Description
80C51 CPU 32 kbytes on-chip ROM, expandable externally to 64 kbytes Program Memory address space P83C524: - 16 kbytes on-chip ROM, expandable externally from 32 kbytes to 64 kbytes Program Memory address space (address space 16 k to 32 k not usable) P80C528: - ROMless version of P83C528 P83C528: - 32 kbytes on-chip ROM, expandable externally from 32 kbytes to 64 kbytes Program Memory address space EPROM versions are available: see separate data sheet P87C524 and P87C528 512 bytes on-chip RAM, expandable externally to 64 kbytes Data Memory address space Four 8-bit I/O ports Full-duplex UART compatible with the standard 80C51 and the 8052 Two standard 16-bit timer/counters An additional 16-bit timer (functionally equivalent to the timer 2 of the 8052) On-chip Watchdog Timer (WDT) with an own oscillator Bit-level I2C-bus hardware serial I/O Port 7-source and 7-vector interrupt structure with 2 priority levels Up to 3 external interrupt request inputs Two programmable power reduction modes (Idle and Power-down) Termination of Idle mode by any interrupt, external or WDT (watchdog) reset Wake-up from Power-down by external interrupt, external or WDT reset ROM code protection XTAL frequency range: 3.5 MHz to 16 MHz and 3.5 MHz to 24 MHz All packaging pin-outs fully compatible to the standard 8051/8052. The P83C524 and P83C528 single-chip 8-bit microcontrollers are manufactured in an advanced CMOS process and are derivatives of the PCB80C51 microcontroller family.
