P89LPC9402 Datasheet | NXP Semiconductors

.. 8-bit microcontroller with accelerated two-clock 80C51 core 8 k B 3 V byte-erasable flash with 32 segment 4 LCD driver Rev. 00.01 - 8 April 2009 Preliminary data sheet 1. General description The P89LPC9402 is a multi-chip module consisting of a P89LPC931A1 single-chip microcontroller bined with a PCF8576D universal LCD driver in a low-cost 64-pin package. The LCD driver provides 32 segments and supports from 1 to 4 backplanes. Display overhead is minimized by an on-chip display RAM with auto-increment addressing. 2. Features 2.1 Principal Features - 8 k B byte-erasable flash code memory organized into 1 k B sectors and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage. - 256-byte RAM data memory. - 32 segment × 4 backplane LCD controller supports from 1 to 4 backplanes. - Two analog parators with selectable inputs and reference source. - Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to bee a PWM output). - A 23-bit system timer that can also be used as real-time clock consisting of a 7-bit prescaler and a programmable and readable 16-bit timer. - Enhanced UART with a fractional baud rate generator, break detect, framing error detection, and automatic address detection; 400 k Hz byte-wide I2C-bus munication port and SPI munication port. - 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V). - Enhanced low voltage (brownout) detect allows a graceful system shutdown when power fails. - 64-pin LQFP package with 20 microcontroller I/O pins minimum and up to 23 microcontroller I/O pins while using on-chip oscillator and reset options. 2.2 Additional Features - A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the...