Datasheet Summary
74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
Rev. 8
- 19 July 2012
Product data sheet
1. General description
The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin patible with the HEF4053B. It is specified in pliance with JEDEC standard no. 7A.
The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a mon enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a mon input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance...