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PC74HC4353 - Triple 2-channel analog multiplexer/demultiplexer

Description

The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B.

It is specified in compliance with JEDEC standard no.

7A.

Features

  • Wide analog input voltage range from 5 V to +5 V.
  • Low ON resistance:.
  • 80  (typical) at VCC  VEE = 4.5 V.
  • 70  (typical) at VCC  VEE = 6.0 V.
  • 60  (typical) at VCC  VEE = 9.0 V.
  • Logic level translation: to enable 5 V logic to communicate with 5 V analog signals.
  • Typical ‘break before make’ built-in.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • CDM JESD22-C101E exceeds 1000 V.
  • Multiple package o.

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Datasheet preview – PC74HC4353

Datasheet Details

Part number PC74HC4353
Manufacturer NXP Semiconductors
File Size 227.29 KB
Description Triple 2-channel analog multiplexer/demultiplexer
Datasheet download datasheet PC74HC4353 Datasheet
Additional preview pages of the PC74HC4353 datasheet.

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Full PDF Text Transcription

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74HC4053; 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer Rev. 8 — 19 July 2012 Product data sheet 1. General description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3.
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