PCA9556 Datasheet | NXP Semiconductors

INTEGRATED CIRCUITS PCA9556 Octal SMBus Registered Interface Product specification 1998 Dec 18 Philips Semiconductors Philips Semiconductors Product specification Octal SMBus Registered Interface Features - SMBus pliance with fixed 3.3V voltage levels - Operating power supply voltage range of 3.0V - 3.6V - Active high polarity inverter register - Write protect register - Active low reset pin - Low leakage current on power-down - Noise filter on SCL/SDA inputs - No glitch on power-up - Internal power-on reset - 8 I/O pins which default to 8 inputs - High impedance open drain on I/O DESCRIPTION The PCA9556 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus applications. The PCA9556 consists of an 8-bit input port register, 8-bit output port register, and an SMBus interface. It has low current consumption and a high impedance open drain output pin, I/O0. The SMBus system master can reset the PCA9556 in the event of a timeout by asserting a LOW on the reset input. The SMBus system master can also invert the PCA9556 inputs by writing to their active HIGH polarity inversion bits. Finally, the SMBus system master can enable the PCA9556’s I/Os as either inputs or outputs by writing to their I/O configuration bits. The power-on reset sets the registers to their default values and initializes the SMBus state machine. The RESET pin causes the same reset/initialization to occur without depowering the part. PIN CONFIGURATION SCL 1 SDA 2 16 VDD 15 RESET 14 I/O7 13 I/O6 12 I/O5 11 I/O4 10 I/O3 9 I/O2 A0 3 A1 4 A2 5 I/O0 6 I/O1 7 VSS 8 su01045 Figure 1. Pin configuration PIN DESCRIPTION PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 SYMBOL SCL SDA A0 A1 A2 I/O0 I/O1 VSS I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 RESET VDD FUNCTION Serial clock line Serial data line Address input 0 Address input 1 Address input 2 I/O0 (open drain) I/O1 Supply GROUND I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 External reset (active LOW) Supply voltage ORDERING...