PCF5077T
Key Features
- CMOS low-voltage, low-power
- Can be used in burst mode with power-down
- 3-wire serial bus interface with the bus available in Power-down mode
- On-chip ramp generator for 256 different power levels with two dynamic ranges
- Two programmable regulator start conditions (VKICK and VHOME)
- Programmable analog output voltage limitation
- Low swing input buffer for the 13 MHz master clock
- Programmable temperature matching
- Dual supply concept for analog and digital part
- No external filter for suppression of clock pulse feed through