PCK2057 Overview
The PCK2057 is a high-performance, low-skew, low-jitter zero delay buffer that distributes a differential clock input pair (CLK, CLK) to ten differential pairs of clock outputs and one differential pair of feedback clock outputs. The clock outputs are controlled by the clock inputs (CLK, CLK), the feedback clocks (FBIN, FBIN), the 2-line serial interface (SDA, SCL), and the analog power input (AVDD). The two-line...
PCK2057 Key Features
- Optimized for clock distribution in DDR (Double Data Rate)