PHB23NQ10LT Datasheet | NXP Semiconductors

description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using Trench MOS technology. 1.2 Features .. s Logic level threshold s Fast switching s Trench MOS technology 1.3 Applications s DC-to-DC converters s Switched-mode power supplies s General purpose switching 1.4 Quick reference data s VDS ≤ 100 V s RDSon ≤ 72 mΩ s ID ≤ 23 A s QGD = 9.3 n C (typ) 2. Pinning information Table 1. Pin 1 2 3 mb Pinning Description gate (G) drain (D) source (S) mounting base; connected to drain mbb076 Simplified outline [1] Symbol D mb 2 1 3 SOT404 (D2PAK) [1] It is not possible to make a connection to pin 2. Philips Semiconductors N-channel Trench MOS logic level FET 3. Ordering information Table 2. Ordering information Package Name PHB23NQ10LT D2PAK Description plastic single-ended surface-mounted package; 3 leads (one lead cropped) Version SOT404 Type number 4. Limiting values Table 3. Limiting values Conditions 25 °C ≤ Tj ≤ 175 °C 25 °C ≤ Tj ≤ 175 °C; RGS = 20 kΩ Tmb = 25 °C; VGS = 10 V; see Figure 2 and 3 Tmb = 100 °C; VGS = 10 V; see Figure 2 IDM Ptot Tstg Tj IS ISM peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs unclamped inductive load; ID = 14.2 A; VDS ≤ 25 V; RGS = 50 Ω; VGS = 5 V; starting at Tj = 25 °C Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 Tmb = 25 °C; see Figure 1 Min - 55 - 55 Max 100 100 ±15 23 16 91 98 +175 +175 23 92 100 Unit V V V A A A W °C °C A A m J In accordance with the Absolute Maximum Rating System (IEC 60134). .. Symbol Parameter VDS VDGR VGS ID drain-source voltage drain-gate voltage (DC) gate-source voltage drain current Source-drain diode Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy PHB23NQ10LT_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 - 11 July 2006 2 of 12 Philips...