• Part: PHX5N50E
  • Description: PowerMOS transistor Isolated version of PHP8N50E
  • Category: Transistor
  • Manufacturer: NXP Semiconductors
  • Size: 24.88 KB
Download PHX5N50E Datasheet PDF
NXP Semiconductors
PHX5N50E
PHX5N50E is PowerMOS transistor Isolated version of PHP8N50E manufactured by NXP Semiconductors.
Philips Semiconductors Objective specification Power MOS transistor Isolated version of PHP8N50E GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a full pack, plastic envelope featuring high avalanche energy capability, stable blocking voltage, fast switching and high thermal cycling performance with low thermal resistance. Intended for use in Switched Mode Power Supplies (SMPS), motor control circuits and general purpose switching applications. QUICK REFERENCE DATA SYMBOL VDS ID Ptot RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Drain-source on-state resistance MAX. 500 4 30 0.8 UNIT V A W Ω PINNING - SOT186A PIN 1 2 3 gate drain source DESCRIPTION PIN CONFIGURATION case SYMBOL d g case isolated 1 2 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDS VDGR ±VGS ID IDM IDR IDRM Ptot Tstg Tj Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (pulse peak value) Source-drain diode current (DC) Source-drain diode current (pulse peak value) Total power dissipation Storage temperature Junction temperature CONDITIONS RGS = 20 kΩ Ths = 25 ˚C Ths = 100 ˚C Ths = 25 ˚C Ths = 25 ˚C Ths = 25 ˚C Ths = 25 ˚C MIN. -55 MAX. 500 500 30 4 2.5 16 4 16 30 150 150 UNIT V V V A A A A A W ˚C ˚C AVALANCHE LIMITING VALUE SYMBOL PARAMETER WDSS CONDITIONS MIN. MAX. UNIT Drain-source non-repetitive ID = 8 A; VDD ≤ 50 V; VGS = 10 V; unclamped inductive turn-off RGS = 50 Ω energy Tj = 25˚C prior to surge Tj = 100˚C prior to surge Drain-source repetitive ID = 8 A; VDD ≤ 50 V; VGS = 10 V; unclamped inductive turn-off RGS = 50 Ω; Tj ≤ 150 ˚C energy WDSR1 - 510 82 13 m J m J m J 1. Pulse width and frequency limited by Tj(max) November 1996 Rev 1.000 Philips Semiconductors Objective specification Power MOS transistor ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 ˚C unless otherwise...