NXP Semiconductors S32R274
32-bit CPU
FEATURES
● On-chip modules available within the device include the following features:● Safety core: Power Architecture® e200Z4 32-bit CPU with checker core
● Dual issue computation cores: Power Architecture® e200Z7 32-bit CPU
● 2 MB on-chip code flash (FMC flash) with ECC
● 1.5 MB on-chip SRAM with ECC
● RADAR processing – Signal Processing Toolbox (SPT) for RADAR signal processing acceleration – Cross Timing Engine (CTE) for precise timing generation and triggering – Waveform generation module (WGM) for chirp ramp generation – 4x 12-bit ΣΔ-ADC with 10 MSps – One DAC with 10 MSps – MIPICSI2 interface to connect external ADCs
● Memory Protection – Each core memory protection unit provides 24 entries – Data and instruction bus system memory protection unit (SMPU) with 16 region descriptors each – Register protection
● Clock Generation – 40 MHz external crystal (XOSC) – 16 MHz Internal oscillator (IRCOSC) – Dual system PLL with one frequency modulated phase-locked loop (FMPLL) – Low-jitter PLL to ΣΔ-ADC and DAC clock generation (not supported on SC66760x devices) Document Number S32R274 Rev.