SAC57D54H Datasheet | NXP Semiconductors

NXP Semiconductors Data Sheet: Technical Data Document Number SAC57D54H Rev. 7, 05/2017 Features - ARM™ Cortex-A5, 32-bit CPU - Supports ARMv7- ISA - 32 KB Instruction cache, 32 KB Data cache - NEON SIMD Media Processing Engine - FPU supporting double precision floating point operations - Memory Management Unit - GIC Interrupt Controller - Up to 320 MHz - ARM™ Cortex-M4, 32-bit CPU - Supports ARMv7 - ISA - 16 KB Instruction cache, 16 KB Data cache - 64 KB Tightly-Coupled Memory (TCM) - Single Precision FPU - NVIC Interrupts Controller - 1.25 DMIPS per MHz integer performance - Up to 160 MHz - I/O Processor - ARM™ Cortex-M0+, 32-bit CPU - Intelligent Stepper Motor Drive - Debug functionality - Run-time debug control of cores and visibility of system resources using the Debug Access Port (DAP) - IEEE 1149.1/ IEEE 1149.7 System JTAG Controller (SJTAG) - Program and Data Trace support (16-bit data width) implemented by the ARM Trace Port Interface Unit (TPIU) Trace capture - Timer - Four 8-channel Flextimer modules (FTM) - Two 4 channel System Timer Module...