FEATURES
I I I I I I I I I I I I I I I I I Dual channel high performance UART 1.8 V operation Advanced package: TFBGA36 Up to 20 Mbit/s data rate (4× sampling) at 1.8 V Programmable sampling rate: 16×, 8×, 4× 128-byte transmit FIFO to reduce the bandwidth requirement of the external CPU 128-byte receive FIFO with error flags to reduce the bandwidth requirement of the external CPU 128 programmable Receive and Transmit FIFO interrupt trigger levels 128 Receive and Transmit FIFO reporting levels (level counters) Automatic software (Xon/Xoff) and hardware (RTS/CTS or DTR/DSR) flow control Programmable Xon/Xoff characters 128 programmable hardware and software trigger levels Automatic 9-bit mode (RS-485) address detection Automatic RS-485 driver turn-around with programmable delay Dual channel concurrent write UART software reset High resolution clock prescaler, from 0 to 15 with granularity of 1⁄16 to allow non-standard UART clock to be used NXP Semiconductors SC16C852SV Dual UART with 128-b...