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TDA10021HT Datasheet PDF

NXP Semiconductors TDA10021HT

The TDA10021HT is a single-chip DVB-C channel receiver for 4, 16, 32, 64, 128 and 256 QAM modulated signals. The device interfaces directly to the IF signal, which is sampled by a 10-bit ADC. The TDA10021HT performs the clock and the carrier recovery functions.
Part No. TDA10021HT
Datasheet TDA10021HT Download
Manufacturer
NXP Semiconductors
Description DVB-C channel receiver
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TDA10021HT datasheet page 1 preview

FEATURES

● 4, 16, 32, 64, 128 and 256 Quadrature Amplitude Modulation (QAM) demodulator (DVB-C compatible: ETS 300-429/ITU-T J83 annex A/C)
● High performance for 256 QAM, especially for direct IF applications
● On-chip 10-bit Analog-to-Digital Converter (ADC)
● On-chip Phase-Locked Loop (PLL) for crystal frequency multiplication (typically 4 MHz crystal)
● Digital downconversion
● Programmable half Nyquist filter (roll off = 0.15 or 0.13)
● Two Pulse Width Modulated (PWM) AGC outputs with programmable take over point (for tuner and downconverter control)
● Clock timing recovery, with programmable 2nd-order loop filter
● Variable symbol rate capability from SACLK/64 to SACLK/4 (SACLK = 36 MHz maximum)
● Programmable anti-aliasing filters
● Full digital carrier recovery loop
● Carrier acquisition range up to 18% of symbol rate
● Integrated adaptive equalizer (linear transversal equalizer or decision feedback equalizer)
● On-chip Forward Error Correction (FEC) decoder (de-interleaver and...
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