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TDA8043 Datasheet PDF

NXP Semiconductors TDA8043

The TDA8043 can handle variable symbol rates without adapting the analog filters within the tuner. The SDD requires the analog in-phase (I) and quadrature (Q) components as an input and provides 8-bit wide MPEG2 transport packet data at the output. The outputs of the SDD can be directly connected to a descrambler (SAA7206) or a demultiplexer (SAA7205).
Part No. TDA8043
Datasheet TDA8043 Download
Manufacturer
NXP Semiconductors
Description Satellite Demodulator and Decoder SDD
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TDA8043 datasheet page 1 preview

FEATURES

● One-chip Digital Video Broadcasting (DVB) compliant demodulator and concatenated Viterbi/Reed-Solomon decoder with de-interleaver and de-randomizer
● 3.3 V supply voltage (up to 5 V allowed)
● Internal clock divider
● On-chip crystal oscillator
● QPSK/BPSK demodulator: – Interpolator to handle variable symbol rates without an external anti-aliasing filter – On-chip Automatic Gain Control (AGC) of the analog input I and Q baseband signals or tuner AGC control – Two on-chip matched Analog-to-Digital Converters (ADCs; 7 bits) – Square-Root Raised-Cosine Nyquist filter with programmable roll-off factor – High maximum symbol frequency: 32 Msymbols/s – Can be used at low channel Es/No (Symbol energy-to-noise ratio) – Internal carrier recovery, clock recovery and AGC loops with programmable loop filters – Two carrier recovery loops enabling phase tracking of the incoming symbols – Different modulation schemes: Quadrature Phase Shift Keying (QPSK) and Binary-Phase Shift Keying (BPSK) – Signal-to-noise ratio (S/N) estimation – External indication of demodulator lock.
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