NXP Semiconductors TDA8083
The TDA8083 can handle variable symbol rates in the range of 12 to 30 Msymbols/s with a minimum number of low cost and non-critical external components. The TDA8083 has minimal interfaces with the tuner. It only requires the demodulated analog I and Q baseband input signals and provides a tuner AGC control signal.| Part No. | TDA8083 |
|---|---|
| Datasheet | TDA8083 Download |
| Manufacturer |  NXP Semiconductors |
| Description | Satellite Demodulator and Decoder SDD3 |
| Buy | Stock & Price |
FEATURES
● One chip Digital Video Broadcasting (DVB) (ETS300421) compliant demodulator and concatenated Viterbi and Reed-Solomon decoder with de-interleaver and de-randomizer● 3.3 V supply voltage
● Relevant outputs are 5 V tolerant to ease interface to 5 V environment
● Few external components for full application
● On-chip crystal oscillator (4 MHz) and Phase-Locked Loop (PLL) for internal clock generation
● Power-on reset module
● QPSK/BPSK demodulator: – Different modulation schemes: Quadrature Phase Shift Keying (QPSK) and Binary Phase Shift Keying (BPSK) – Interpolator and internal anti-aliasing filter to handle variable symbol rates – Tuner Automatic Gain Control (AGC) control – Two on-chip matched 7-bit Analog-to-Digital Converters (ADCs) – Square-root raised-cosine Nyquist – Maximum symbol frequency of 30 Msymbols/s – Can be used at low channel Signal-to-Noise Ratio (S/R) – Internal full digital carrier recovery, clock recovery and AGC loops with programmable loop filters – Two carrier recovery loops enabling optimum phase noise suppression – S/R estimation.
