TDA8768 Overview
Key Features
- 12-bit resolution
- Sampling rate up to 55 MHz
- 3 dB bandwidth of 190 MHz
- 5 V power supplies
- Binary or twos-complement CMOS outputs
- In-range CMOS-compatible output
- TLL-CMOS compatible static digital inputs
- 3 to 5 V CMOS-compatible digital outputs
- Differential clock input; Positive Emitter Coupled Logic (PECL)-compatible
- Power dissipation 325 mW (typical)
Representative TDA8768 image (package may vary by manufacturer)
