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UAA2068G Datasheet PDF

NXP Semiconductors UAA2068G

The UAA2068G BiCMOS device integrates a 950 MHz VCO, a frequency doubler, main and reference dividers and a phase comparator, to implement a phase-locked loop for DECT channel frequencies. The 1.9 GHz signal is buffered and switched, in TX mode, to drive the transmit power amplifier (CGY20xx series) or, in RX mode, to be used as an LO signal for the receiver mixer IC (UAA2078). The synthesizer’s main divider is driven by the frequency doubler output in the range from 1880 to 1920 MHz and programmed via a 3-wire serial bus.
Part No. UAA2068G
Datasheet UAA2068G Download
Manufacturer
NXP Semiconductors
Description Transmit chain and synthesizer with integrated VCO for DECT
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UAA2068G datasheet page 1 preview

FEATURES

● Economical integrated solution for frequency generation in DECT cordless telephones
● Integrated low phase noise 950 MHz VCO with frequency doubler
● Local Oscillator (LO) drive (−14 dBm) for RF mixer circuit
● Dedicated DECT PLL synthesizer
● 3-line serial interface bus
● 3 dBm output preamplifier with an integrated switch
● Low current consumption from 3 V supply
● Compatible with Philips Semiconductors ABC baseband chip (PCD509x series).

APPLICATIONS

● 1880 to 1920 MHz DECT cordless telephones.

GENERAL DESCRIPTION

ORDERING INFORMATION PACKAGE TYPE NUMBER NAME UAA2068G LQFP32

DESCRIPTION

UAA2068G The reference divider ratio is fixed at 8. Outputs of the main and reference dividers drive a phase comparator where a charge pump produces phase error current pulses for integration in an external loop filter. Only a passive loop filter is necessary. The charge-pump current (phase comparator gain) is set by an external resistor at pin RSET. The VCO is powered from an internally regulated voltage source and includes internal varicap diodes.
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