DS50PCI401 Datasheet PDF (2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver) | Download National Semiconductor Corporation DS50PCI401

DS50PCI401 - 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver

Description

The DS50PCI401 is a low power, 4 lane bidirectional buffer/ equalizer designed specifically for PCI Express Gen1 and Gen2 applications.

The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system.

Features

Input and Output signal conditioning increases PCIe reach in backplanes and cables FR4 (with Input EQ).
0.09 UI of residual deterministic jitter at 5Gbps after 42” of.
0.11 UI of residual deterministic jitter at 5Gbps after 7m of PCIe Cable (with Input EQ) FR4 (with Output DE).
0.09 UI of residual deterministic jitter at 5Gbps with 28” of.
0.13 UI of residual deterministic jitter at 5Gbps with 7m of PCIe Cable (with Output DE).
Adjustable Transmit VOD 800 to 120.

Datasheet Details

Part number	DS50PCI401
Manufacturer	National Semiconductor Corporation
File Size	961.54 KB
Description	2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver
Datasheet	DS50PCI401 Datasheet
Additional preview pages of the DS50PCI401 datasheet.

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Full PDF Text Transcription

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DS50PCI401 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver with Equalization and De-Emphasis www.DataSheet4U.com June 25, 2009 DS50PCI401 2.5 Gbps / 5.0 Gbps 4 Lane PCI Express Transceiver with Equalization and De-Emphasis General Description The DS50PCI401 is a low power, 4 lane bidirectional buffer/ equalizer designed specifically for PCI Express Gen1 and Gen2 applications. The device performs both receive equalization and transmit de-emphasis, allowing maximum flexibility of physical placement within a system. The receiver is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium.

Published: Jul 7, 2009 |