GENERAL DESCRIPTION
The preset feature allows the ’AC191 to be used in programmable dividers. The Count Enable input, the Terminal Count output and the Ripple Clock output make possible a variety of methods of implementing multistage counters. In the counting modes, state changes are initiated by the rising edge of the clock. FEATURES
n n n n n n n ICC reduced by 50% High speed — 133 MHz typical count frequency Synchronous counting Asynchronous parallel load Cascadable Outputs source/sink 24 mA Standard Military Drawing (SMD) — ’AC191: 5962-89749 Logic Symbols Connection Diagrams Pin Assignment for DIP and Flatpack DS100279-1 IEEE/IEC DS100279-3 Pin Assignment for LCC DS100279-2 Pin Names CE CP P0–P3 PL U/D Q0–Q3 RC TC DESCRIPTION
Count Enable Input Clock Pulse Input Parallel Data Inputs Asynchronous Parallel Load Input Up/Down Count Control Input Flip-Flop Outputs Ripple Clock Output Terminal Count Output DS100279-4 FACT™ is a trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100279 Functional DESCRIPTION
The ’AC191 is a synchronous up/down counter.
National Semiconductor
