• Part: 54AC258
  • Description: Quad 2-Input Multiplexer
  • Manufacturer: National Semiconductor
  • Size: 162.48 KB
Download 54AC258 Datasheet PDF
National Semiconductor
54AC258
54AC258 is Quad 2-Input Multiplexer manufactured by National Semiconductor.
.. - 54ACT258 Quad 2-Input Multiplexer with TRI-STATE Outputs August 1998 - 54ACT258 Quad 2-Input Multiplexer with TRI-STATE ® Outputs General Description The ’AC/’ACT258 is a quad 2-input multiplexer with TRI-STATE outputs. Four bits of data from two sources can be selected using a mon data select input. The four outputs present the selected data in the plement (inverted) form. The outputs may be switched to a high impedance state with a HIGH on the mon Output Enable (OE) input, allowing the outputs to interface directly with bus-oriented systems. n n n n n Multiplexer expansion by tying outputs together Inverting TRI-STATE outputs Outputs source/sink 24 m A ’ACT258 has TTL-patible inputs Standard Military Drawing (SMD) - ’ACT258: 5962-88704 - ’AC258: 5962-91604 Features n ICC and IOZ reduced by 50% Logic Symbols IEEE/IEC DS100287-1 DS100287-2 Pin Names S OE I0a- I0d I1a- I1d Za- Zd Description mon Data Select Input TRI-STATE Output Enable Input Data Inputs from Source 0 Data Inputs from Source 1 TRI-STATE Inverting Data Outputs TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT ® is a registered trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100287 .national. Connection Diagrams Pin Assignment for DIP and Flatpak Functional Description The ’AC/’ACT258 is a quad 2-input multiplexer with TRI-STATE outputs. It selects four bits of data from two sources under control of a mon Select input (S). When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in inverted form. The ’AC/’ACT258 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = OE - (I1a - S + I0a -...