GENERAL DESCRIPTION
When LE is low, the data satisfying the input timing requirements is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high impedance state. The ’ACQ/’ACTQ373 utilizes NSC Quiet Series technology to guarantee quiet output switching and improve dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoot corrector in addition to a split ground bus for superior performance. FEATURES
n ICC and IOZ reduced by 50% n Guaranteed simultaneous switching noise level and dynamic threshold performance n Improved latch up immunity n Eight latches in a single package n TRI-STATE outputs drive bus lines or buffer memory address registers n Outputs source/sink 24 mA n Faster prop delays than the standard ’AC/’ACT373 n 4 kV minimum ESD immunity (’ACQ) n Standard Military Drawing (SMD) — ’ACTQ373: 5962-92188 — ’ACQ373: 5962-92178 Logic Symbols IEEE/IEC DS100238-1 DS100238-2 Pin Names D0–D7 L...
National Semiconductor
