54F189 Datasheet | National Semiconductor

Description The ’F189 is a high-speed 64-bit RAM organized as a 16word by 4-bit array Address inputs are buffered to minimize loading and are fully decoded on-chip The outputs are TRISTATE and are in the high impedance state whenever the Chip Select (CS) input is HIGH The outputs are active only in the Read mode and the output data is the plement of the stored data Features Y TRI-STATE outputs for data bus applications Y Buffered inputs minimize loading Y Address decoding on-chip Y Diode clamped inputs minimize ringing Y Available in SOIC (300 mil only) mercial 74F189PC 74F189SC (Note 1) 74F189SJ (Note 1) Military 54F189DL (Note 2) 54F189FL (Note 2) 54F189LL (Note 2) Package Number N16E J16A M16A M16D W16A E20A Package Description 16-Lead (0 300 Wide) Molded Dual-In-Line 16-Lead Ceramic Dual-In-Line 16-Lead (0 150 Wide) Molded Small Outline JEDEC 16-Lead (0 300 Wide) Molded Small Outline EIAJ 16-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DLQB FLQB and LLQB Logic Symbols Connection Diagrams Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC IEEE IEC TL F 9493- 1 TL F 9493 - 2 TL F 9493 - 3 TL F 9493- 4 TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9493 RRD-B30M105 Printed in U S A Unit Loading Fan Out Pin Names A0 - A3 CS WE D0 - D3 O0 - O3 Description Address Inputs Chip Select Input (Active LOW) Write Enable Input (Active LOW) Data Inputs Inverted Data Outputs UL HIGH LOW 10 10 10 10 10 10 10 10 150 40 (33 3) 54F 74F Input IIH IIL Output IOH IOL 20 m A b0 6 m A 20 m A b1 2 m A 20 m A b0 6 m A 20 m A b0 6 m A b3 0 m A 24 m A (20 m A) Function Table Inputs Operation CS...