54F534 Datasheet | National Semiconductor

Description The ’F534 is a high speed low-power octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications A buffered Clock (CP) and Output Enable (OE) are mon to all flip-flops The ’F534 is the same as the ’F374 except that the outputs are inverted Features Edge-triggered D-type inputs Buffered positive edge-triggered clock TRI-STATE outputs for bus-oriented applications Guaranteed 4000V minimum ESD protection mercial 74F534PC Military Package Number N20A Package Description 20-Lead (0 300 Wide) Molded Dual-In-Line 20-Lead Ceramic Dual-In-Line 20-Lead (0 300 Wide) Molded Small Outline JEDEC 20-Lead (0 300 Wide) Molded Small Outline EIAJ 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier Type C 54F534DM (Note 2) 74F534SC (Note 1) 74F534SJ (Note 1) 54F534FM (Note 2) 54F534LM (Note 2) J20A M20B M20D W20A E20A Note 1 Devices also available in 13 reel Use suffix e SCX and SJX Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB Logic Symbols IEEE IEC TL F 9549 - 1 TL F 9549 - 5 Unit Loading Fan Out 54F 74F Pin Names Description UL HIGH LOW Input IIH IIL Output IOH IOL D0 - D7 CP OE O0 - O 7 Data Inputs 10 10 20 m A b0 6 m A Clock Pulse Input (Active Rising Edge) 10 10 20 m A b0 6 m A TRI-STATE Output Enable Input (Active LOW) 10 10 20 m A b0 6 m A plementary TRI-STATE Outputs 150 40(33 3) b3 m A 24 m A (20 m A) TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9549 RRD-B30M75 Printed in U S A Connection Diagrams Pin Assignment for DIP SOIC and Flatpak Pin Assignment for LCC TL F 9549 - 3 TL F 9549- 2 Functional Description The ’F534 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE plementary outputs The buffered clock and buffered Output Enable are mon to all flip-flops The eight flip-flops will store the state of their...