54F825
Description
The ’F825 is an 8-bit buffered register It has Clock Enable and Clear features which are ideal for parity bus interfacing in high performance microprogramming systems Also included in the ’F825 are multiple enables that allow multiuser control of the interface The ’F825 is functionally and pin patible with AMD’s Am29825.
Key Features
- Y TRI-STATE output Y Clock enable and clear Y Multiple output enables Y Direct replacement for AMD’s Am24825
