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54HC133 - 13-Input NAND Gate

General Description

This NAND gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits All gates have buffered outputs All devices have high noise immunity and the ability to drive 10 LS-TTL loads The 54HC

Key Features

  • Y Typical propagation delay 20 ns Y Wide power supply range 2.
  • 6V Y Low quiescent current 20 mA maximum (74HC Series) Y Low input current 1 mA maximum Y Fanout of 10 LS-TTL loads Connection and Logic Diagrams Dual-In-Line Package Top View Order Number MM54HC133 or MM74HC133 TL F 5134.
  • 1 C1995 National Semiconductor Corporation TL F 5134 TL F 5134.
  • 2 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 2) If Military Aerospace specified devices are requ.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MM54HC133 MM74HC133 13-Input NAND Gate January 1988 MM54HC133 MM74HC133 13-Input NAND Gate General Description This NAND gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits All gates have buffered outputs All devices have high noise immunity and the ability to drive 10 LS-TTL loads The 54HC 74HC logic family is functionally as well as pin-out compatible with the standard 54LS 74LS logic family All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground Features Y Typical propagation delay 20 ns Y Wide power supply range 2 – 6V Y Low quiescent current 20 mA maximum (74HC Series) Y Low input current 1 mA maximum Y Fanout of 10