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54LS114 Datasheet Dual Jk Flip-flop

Manufacturer: National Semiconductor (now Texas Instruments)

Overview: 54LS114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears June 1989 54LS114 Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears.

General Description

The ’LS114

Key Features

  • individual J K and set inputs and common clock and common clear inputs When the clock goes HIGH the inputs are enabled and data will be accepted The logic level of the J and K inputs may be allowed to change when the Clock Pulse is HIGH and the bistable will perform according to the truth table as long as the minimum setup times are observed Input data is transferred to the outputs on the negative-going edge of the clock pulse Connection Diagram Dual-In-Line Package Logic Symbol TL F 10176.

54LS114 Distributor

More Datasheets from National Semiconductor (now Texas Instruments)

Part Number Description
54LS11 Triple 3-Input AND Gates
54LS10 Triple 3-Input NAND Gates
54LS109 Dual Positive-Edge-Triggered J-K Flip-Flops
54LS13 DUAL 4-INPUT SCHMITT TRIGGER
54LS133 13-INPUT NAND GATE
54LS136 QUAD 2-INPUT EXCLUSIVE-OR GATE
54LS138 (54LS138 / 54LS139) Decoders/Demultiplexers
54LS139 (54LS138 / 54LS139) Decoders/Demultiplexers
54LS14 Hex Inverters
54LS151 Data Selector/Multiplexer