54LS256 Description
The ’LS256 is a dual 4-bit addressable latch with mon control inputs these include two Address inputs (A0 A1) an active LOW enable input (E) and an active LOW Clear input (CL) Each latch has a Data input (D) and four outputs (Q0 Q3) When the Enable (E) is.
54LS256 Key Features
- Q3a Q0b