54LVX4245 Datasheet | National Semiconductor

.. 54LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE Outputs January 1999 54LVX4245 8-Bit Dual Supply Translating Transceiver with TRI-STATE ® Outputs General Description The LVX4245 is a dual-supply, 8-bit translating transceiver that is designed to interface between a 5V bus and a 3V bus in a mixed 3V/5V supply environment. The Transmit/Receive (T/R) input determines the direction of data flow. Transmit (active-HIGH) enables data from A ports to B ports; Receive (active-LOW) enables data from B ports to A ports. The Output Enable input, when HIGH, disables both A and B ports by placing them in a TRI-STATE condition. The A port interfaces with the 5V bus; the B port interfaces with the 3V bus. The LVX4245 is suitable for mixed voltage applications such as systems using 3.3V memories which must interface with existing buses or other ponents operating at 5.0V. Features n n n n n n n n Bidirectional interface between 5V and 3V buses Control inputs patible with TTL level 5V data flow at A port and 3V data flow at B port Outputs source/sink 24 m A Available in Ceramic DIP and Flatpack packages Implements patented EMI reduction circuitry Functionally patible with the 54 series 245 Standard Microcircuit Drawing (SMD) 5962-9860601 Ordering Code Order Number 54LVX4245J-QML 54LVX4245W-QML Package Number J24F W24C 24-Lead Cerpack Package Description 24-Lead Ceramic Dual-in-line Logic Symbol Connection Diagram Pin Assignment for CDIP and Cerpack DS101021-1 Pin Descriptions Pin Names OE T/R A0- A7 B0- B7 Description Output Enable Input Transmit/Receive Input Side A Inputs or TRI-STATE Outputs Side B Inputs or TRI-STATE Outputs DS101021-2 TRI-STATE ® is a registered trademark of National Semiconductor © 1999 National Semiconductor Corporation DS101021 .national. Truth Table Inputs OE L L H H = High Voltage Level L = Low Voltage Level X = Immaterial Outputs T/R L H X Bus B Data to Bus A Bus A Data to Bus B HIGH-Z...