DESCRIPTION
— The ’192 is an up/down BCD decade (8421) counter. Sepa rate Count Up and Count Down Clocks are used and in either counting mode the circuits operate synchronously. Separate Terminal Count Up and Terminal Count Down outputs are provided which are used as the clocks for a subsequent stage without extra logic, thus simplifying multistage counter.designs. Individual preset inputs allow the circuits to be used as programmable counters. Both the Parallel Load (PL) and the Master Reset (MR) inputs asynchronously override the clocks. ORDERING CODE: See Section 9 PKGS PIN OUT COMMERCIAL GRADE Vcc = +5.0 V ±5%, Ta = 0°C to +70°C MILITARY GRADE Vcc =+5.0 V ±10%, Ta = -55° C to +125°C Plastic DIP (P) A 74192PC,74LS192PC Ceramic DIP (D) A 74192DC, 74LS192DC 54192DM, 54LS192DM Flatpak (F) A 74192FC, 74LS192FC 54192FM, 54LS192FM PKG TYPE 9B 6B 4L 192 CONNECTION DIAGRAM PINOUT A Pt|T Qi [T OoE CPd [7 CPu [ 7 Q2 [6 Q 3 [7 GND [8 Tsl vcc m Po 14] MR IT IfC p TSJtCu 77] PL 7o]P2 T )P 3 LOG...
National Semiconductor
